Debug Engineer
AMD
- Location
- Bangalore, India
- Employment
- Full Time
- Work model
- On-Site
- Level
- Senior
Skills
About this role
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward. Debug Engineer THE ROLE: AMD is looking for a highly motivated and experienced Silicon Debug Engineer to join our Platform Bring-up and Validation team. In this role, you will be responsible for post-silicon validation, debug, and platform enablement activities for next-generation x86-based products. You will work closely with Architecture, Design, Firmware, BIOS, and Software teams to identify, isolate, and resolve complex silicon and platform issues, helping drive products from bring-up through production readiness. THE PERSON: The ideal candidate is a technically strong, self-driven engineer with extensive experience in post-silicon validation and debug of x86 platforms. You possess deep knowledge of system architecture, firmware, and hardware interactions and have a proven track record of root-causing complex issues. You thrive in a collaborative environment, communicate effectively across teams, and enjoy mentoring junior engineers while driving technical excellence.
KEY RESPONSIBILITIES
Identify, isolate, and debug hardware, firmware, and platform issues using scan dumps, trace tools, logic analyzers, oscilloscopes, and other silicon debug tools. Perform post-silicon validation and characterization of AMD x86 SoC and platform components. Collaborate with Design, Architecture, BIOS, Firmware, Validation, and Software teams to root-cause failures and drive corrective actions. Analyze silicon behavior and correlate results with design specifications, simulations, and pre-silicon models. Support platform bring-up activities and contribute to platform stability, performance, and readiness milestones. Develop and maintain debug utilities, test scripts, and automation frameworks using Python, Perl, or similar scripting languages. Execute regression, stress, and validation testing to ensure product quality and reliability. Drive BIOS/UEFI validation efforts and debug firmware-related issues across platform subsystems. Prepare comprehensive debug reports, failure analyses, validation summaries, and technical documentation for stakeholders. Mentor junior engineers and foster a productive, collaborative engineering environment.
PREFERRED EXPERIENCE
8+ years of experience in post-silicon validation, platform bring-up, and silicon debug of x86-based systems. Strong understanding of x86 architecture, system architecture, CPU subsystems, memory hierarchy, and SoC design. Experience debugging interfaces and technologies including PCIe, DDR, USB, Ethernet, and other platform I/O subsystems. Deep knowledge of BIOS/UEFI and x86 firmware architecture. Strong expertise in memory technologies, RAS (Reliability, Availability, Serviceability), and power management features. Hands-on experience with silicon debug tools such as Intel Trace Hub, DCI, or similar debug infrastructures. Proficiency with lab equipment including logic analyzers, protocol analyzers, oscilloscopes, and related validation tools. Experience with firmware and low-level software interactions with hardware. Strong scripting and automation skills using Python, Perl, or equivalent languages. ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or a related field.