Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

General Information

Job Title

Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

Job ID

18259

Country

Canada

City

Ottawa

State/Province

Ottawa (Hines Road)

Date Posted

20-Jul-2026

Job Category

Engineering

Job Subcategory

R&D Engineering

Hire Type

Employee

Remote Eligible

No

Descriptions & Requirements

Job Description and Requirements

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent your career building and leading teams that ship advanced SerDes IP, and you understand that execution is everything. The difference between a program that delivers and one that slips is usually a decision made six months earlier, and you are the kind of leader who sees it coming and adjusts before it becomes a crisis. Managing distributed teams across time zones does not intimidate you. You create alignment between analog designers, verification engineers, and firmware developers while keeping customer commitments front and center. When silicon bring-up hits an unexpected issue, you are the person the team calls because you cut through noise and mobilize the right people without creating panic. At Synopsys, you will lead the team building 112G and 224G Ethernet SerDes IP that powers AI infrastructure and hyperscale data centers.

Lead an R&D organization developing 112G/224G Ethernet SerDes and Interface PHY IP for AI/HPC, networking, and data center markets Own execution planning, staffing, and delivery commitments across multiple concurrent programs and customer milestones Drive technical alignment across architecture, analog, digital, verification, firmware, and customer support teams Partner with product and program management to translate roadmap priorities into executable engineering plans Define processes for milestone reviews, risk management, and decision-making that keep programs moving Lead resolution of customer-critical issues from triage through root-cause analysis and corrective action Develop engineering talent through coaching, performance management, hiring, and succession planning The Impact You Will Have Deliver production-quality Ethernet SerDes IP that enables customers to meet performance and time-to-market goals Build execution discipline that consistently meets delivery commitments without burning out the team Establish quality practices that reduce post-release issues and customer escalations Develop future technical and managerial leaders through structured coaching Drive methodology improvements and automation that measurably improve productivity Shape the technical direction of next-generation SerDes platforms What You'll Need BS/MS/PhD in Electrical Engineering, Computer Engineering, or related discipline 15+ years of semiconductor development experience with progression into engineering leadership Proven experience leading engineering teams with significant schedule, quality, and customer impact Strong understanding of SerDes PHY digital development flows including architecture, RTL, verification, firmware, integration, and release Experience with Ethernet, PCIe/CXL, or other high-speed protocols; Ethernet SerDes experience strongly preferred Track record managing execution across distributed teams and multiple stakeholders Who You Are You can walk into a program review, hear five opinions on why a milestone is at risk, and synthesize the real issue in under ten minutes When a customer escalation lands, you get into the