Principal Engineer ASIC or Sr Principal Engineer ASIC

RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Space Systems sector, Digital Space Technology group located in Manhattan Beach, California, is seeking a motivated candidate to join the Electronics and Payloads Directorate. The selected candidate will become a Principal Engineer ASIC or Sr. Principal Engineer ASIC. The qualified applicant will work on digital designs for cutting edge space applications. Primary responsibilities may include, but not limited to: Development of RTL Design for digital systems Perform simulation and emulation (lab integration), synthesis, timing analysis, logic equivalency check, etc Development of verification plans and verification test benches using VHDL or System Verilog Performing trace requirements as well as performing review and audits on the simulation test procedures and test environment **Please be aware that this position is contingent upon capturing program award(s) and obtaining and maintaining associated business and/or customer funding ** This requisition may be filled at either a Principal Engineer ASIC or Senior Principal Engineer ASIC level based on the qualifications listed below.

Principal level: STEM Bachelor's degree with 5+ years of engineering experience; or a STEM Master's degree with 3+ years of experience; or a STEM PhD. degree with 1+ years of experience Experienced in RTL (VHDL or Verilog) design for space applications Development of ASIC/FPGA architecture based on requirements Must have the ability to obtain and maintain an active Government security clearance Sr. Principal level: STEM Bachelor's degree with 8+ years of engineering experience; or a STEM Master's degree with 6+ years of experience; or a STEM PhD. degree with 4+ years of experience Experienced in RTL (VHDL or Verilog) design for space applications Development of ASIC/FPGA architecture based on requirements Must have the ability to obtain and maintain an active Government security clearance Preferred Qualifications:  Hands-on lab experience with testing of digital hardware is highly desired Experience with RTL design using Xilinx Vivado or Microchip Libero Experience in SystemVerilog/UVM methodology for verification Experience in DSP for Digital Communications design Experience in digital network design Active DoD Clearance or equivalent **Please be aware that this position is contingent upon capturing program award(s) and obtaining and maintaining associated business and/or customer funding ** Primary Level Salary Range: $125,300.00 - $187,900.00 Secondary Level Salary Range: $156,400.00 - $234,600.00 The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward