ASIC AMS Verification Engineer (m/f/d) Flexible EU

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ASIC AMS Verification Engineer (m/f/d) Flexible EU - Remote

7/7/26

At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world.

We are looking for an experienced ASIC AMS Verification Engineer to strengthen our mixed-signal ASIC design team in the Sensors Business Unit. In this role, you will verify analog and mixed-signal IPs, subsystems, and top-level ASICs for our industrial, medical, and automotive sensing solutions. You will work closely with our System Architect, analog/mixed-signal/digital frontend and backend engineers Job Requirements

Define and execute AMS verification plans from specification to sign-off Develop and maintain reusable mixed-signal verification environments using UVM and constrained random techniques Create and use SystemVerilog real-number (SV-RN) and Verilog-AMS behavioral models Apply Assertion Based Verification techniques at block and top level Verify analog/digital interactions, including:

Sensor front ends ADCs / DACs Bias and reference circuits Digital control and calibration loops Power management and startup behavior

Run functional, corner, and post-layout simulations Perform Electrical Rules Checks (floating nodes, missing level shifters, overvoltage violations) Debug verification failures and drive coverage closure Support methodology improvements, documentation, and handover Coordinate day-to-day verification activities and provide technical training to cross-functional teams What your background should look like

MSc / PhD in Electrical Engineering, Microelectronics, Physics, or similar Experience in AMS verification or mixed-signal ASIC development Proven track record of successful tape-outs Strong hands-on experience with:

Cadence AMS Designer (ADE-XL / Maestro), Xcelium, Spectre or equivalent SystemVerilog, UVM, Verilog-AMS Python / Tcl / Shell scripting

Analog and mixed-signal design concepts and basic IC building blocks Mixed-signal simulation and verification flows ASIC development from specification to tape-out

Familarity with DfT and Functional Safety experience is a big plus.

We are legally required to state the collective agreement minimum salary for this position. Depending on qualifications, this amounts to €5,100 gross per month (full-time, paid 14 times per year). A higher salary is possible depending on the candidate’s individual qualifications, education, and professional experience. Competencies

SET : Strategy,