Principal System Test Validation Engineer
AMD
- Location
- Austin, Texas
- Employment
- Full Time
- Work model
- On-Site
- Level
- Principal
Skills
About this role
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.
THE ROLE
The technical leader will be responsible for System and Silicon validation of AMD EPYC Server & AMD Instinct products. The successful candidate will work as part of the post-silicon validation group; facilitating all aspects of validation and debug for system level failures working with engineering teams across AMD. Candidate will be immersed in challenging system debug work as well as developing & executing validation strategy for optimal debug throughput on current product to meet milestones at POR quality. The system debug lead will also help in driving improvements to future debug methodology. The candidate should be able to work in a global environment while maintaining a synergetic culture. THE PERSON: We are looking for a disciplined and dynamic, Lead System Validation Engineer - AI Rack Validation to join our growing post-Si debug team supporting the next generation of AMD’s flagship server CPU & Instinct products. As a diligent leader in Validation, you will drive balanced, scalable, and automated solutions to avail optimal debug throughput. In this high visibility position, you will be part of a leading team to innovate and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. Your technical leadership skills, validation and debug expertise will be necessary towards product development, definition, root cause and resolution. Your agility and collaborative approach will be essential to work with. Engineering teams and other stakeholders (System Architects, IP design, SoC, FW, SW, manufacturing).
KEY RESPONSIBILITIES
Lead system-level, rack-level, and cluster-scale validation strategy for AI and machine learning server platforms. Define and drive comprehensive validation plans covering customer deployment scenarios across scale-up and scale-out environments. Develop validation methodologies and test strategies spanning CPU, GPU, memory, BIOS, BMC, networking, storage, platform firmware, operating systems, and infrastructure components. Collaborate with architecture, hardware, firmware, software, and platform engineering teams to define validation requirements, identify coverage gaps, and improve overall product quality. Lead investigation and root cause analysis of complex hardware, firmware, software, networking, and system integration issues. Drive technical decision-making within the validation organization and influence cross-functional teams to resolve critical product risks and quality concerns. Define and enhance scalable validation frameworks, automation infrastructure, telemetry-driven workflows, and data-driven validation methodologies. Analyze large-scale validation data to identify systemic failures, reliability risks, performance bottlenecks, and product readiness concerns. Establish validation readiness criteria, quality metrics, and coverage strategies that improve execution efficiency and provide early risk identification. Mentor and provide technical leadership to engineers, helping improve validation methodologies, automation capabilities, debugging effectiveness, and system-level engineering practices. Drive execution across multiple validation programs while managing priorities, dependencies, schedules,