Engineer-ARM Neon,ARM SVE,Performance optimization

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: •    Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. • 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Detailed JD: ========== Job Description: CPU Software & Hardware Co-Design Engineer (ML Systems) Location: Bangalore (or relevant) Levels: Engineer / Senior Engineer / Staff / Principal Engineer Role Overview We are building a high-impact team at the intersection of CPU architecture, machine learning workloads, and system-level performance optimization . This role focuses on CPU software–hardware co-design for next-generation QMX architectures , including workload characterization, simulation, kernel optimization, and driving architectural insights for future CPU designs. The ideal candidate will work across the full stack—from ML models to low-level kernels to architectural feedback—enabling efficient execution of ML workloads on CPU platforms .

1. ML Workload Identification & Characterization Identify and prioritize critical ML use cases and models for CPU-centric execution (LLMs, vision, speech, recommender systems, etc.) Analyze workload characteristics including: Compute intensity Memory bandwidth and cache behavior Parallelism and dataflow patterns 2. Simulation & Trace Generation Generate detailed execution traces for ML workloads using QEMU or equivalent simulators Develop tooling to: Capture instruction-level execution behavior Extract performance counters and bottlenecks Enable accurate modeling of workload behavior for architectural exploration 3. Bottleneck Analysis & Performance Optimization Identify system bottlenecks across: CPU pipelines Memory hierarchy Instruction utilization Optimize critical hotspots through: Kernel-level tuning Algorithmic improvements Data layout and memory optimizations Drive measurable improvements in workload performance 4. Software–Hardware Co-Design Collaborate with CPU architecture and design teams to: Provide data-driven insights from real workloads Identify inefficiencies and propose architectural enhancements Influence next-generation CPU features in: Compute units Vector/SIMD extensions (e.g., QMX) Memory subsystems 5. ML Kernel & Library Development (QMX Focus) Design and implement highly optimized ML kernels and libraries for QMX architecture Develop kernels for: GEMM, convolution, attention, activation functions, etc. Enable integration with: Open-source ML frameworks (e.g., PyTorch, ONNX, XNNPACK, MLAS) Apply advanced optimizations: SIMD/vectorization Cache-aware execution Parallel execution strategies 6. Benchmarking & Performance Engineering Optimize CPU-centric ML benchmarks such as: Geekbench AI Internal benchmarking suites Establish performance baselines and track improvements across