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2027校招 - 模拟版图设计工程师 / Layout Engineer

Texas Instruments

Shanghai, ChinaMidH-1B sponsor company
Sign in to applyVerified 1h ago
Location
Shanghai, China
Work model
On-Site
Level
Mid
H-1B history
51 approvals (FY2023)
Posted
10h ago

About this role

Change the world. Love your job. Layout Engineers develop and prepare multi-dimensional layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by designers. Their work may be completed through use of CAD or other computerized equipment. Layour engineers will checks dimensions, write specifications, and verify the completed drawings, artwork or digitized plots. A bachelor's degree in engineering is typically required. A typical day-to-day in this role is working on high-quality mixed-signal layout design for automotive Class-D audio products. You will interact with circuit designers, do floorplan and routing, run physical verification (DRC/LVS/QRC), address parasitic impacts to achieve the layout design can meet the requirements from both performance and die size. The team is a great team because this is a global layout team to have team members both in Shanghai and US, we’re doing the most complex layout design inside TI. In this role, you will work most closely with Analog designers, layout designers, production designers, and the packaging designers. Some of the people you'll get to work with include the experts from process development team, EDA team, packaging team, assembly team and pdk/EDS team The most challenging aspect of this role is balancing high-quality of the constraints with tight project schedules. Automotive Class-D Aduio amplifier is a huge and complex device, it brings more trouble on layout design. Know base need be ready from signal chain to high power. The best thing about this role is you work with the senior experts to solve the real-world problems, to make the new generations design in the key customers( Tesla, Toyota, Hamman). You can receive mentorship from both China and the US, giving you a truly global perspective early in your career. An example of a project you would work on in this role is high-power Class-D automotive audio amplifier ICs, where you will handle complex mixed-signal block layouts. High-current power routing, sensitive analog matching, and custom lead-frame/packaging integration. During the first 30 days of this role, you will get onboarded with our EDA design environment and layout flows, complete foundational training on analog layout design, meet your mentors and global team members, and start assisting on smaller mixed-signal block designs. Something interesting about this role that wasn't in the job description is you can develop your career path within both technical and manager role. The key to succeeding in this role is patience, proactive communication, and resilience under pressure. Being eager to learn, active in cross-site communication, and calm during deadline-driven verification cycles will set you up for long-term success. The steepest learning curve in this role is master strain/parasitic effects, power/ground routing constraints, and automotive ESD/EMC reliability rules for high-power Class-D circuits while navigating smooth cross-border teamwork. Our vision for the team is to be recognized as a center of excellence for high-performance automotive Class-D audio layout design, delivering high quality layout design and continuous innovation. Key responsibilities of this role include Collaborating with global design teams (Shanghai and Dallas), sometimes from multiple geographical locations, to understand the architecture and key requirements in the creation of dies, and the managing of the circuit layouts from floor planning to fabrication. Took the roles to create the high-quality layout design to meet the area and schedule limitation. Conducting layout reviews and confirming all verifications and specifications have been met. Working with our design and packaging teams to develop the ARC custom lead-frames. Work close with design team to under the design requirements Supporting post-layout back annotation and iterative optimization with circuit designers.

2027校招 - 模拟版图设计工程师 / Layout Engineer at Texas Instruments, Shanghai, China | Yoinka