MGR II R&D/PRODUCT DVL ENGINEERING

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MGR II R&D/PRODUCT DVL ENGINEERING

5/14/26

At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world.

As a Principal Signal Integrity Engineer, you will lead the electrical architecture, system-level design strategy, and advanced signal integrity solutions for high-speed interconnect platforms, including connectors, cable assemblies, and system interfaces. You will serve as the technical authority driving signal integrity methodologies, defining design standards, and influencing product roadmaps aligned with next-generation high-speed protocols. This role requires close collaboration with global cross-functional teams and direct engagement with key customers to solve complex system-level challenges. In addition, you will play a critical role in developing organizational capability by mentoring and training engineers, ensuring strong technical depth across the team. KEY RESPONSBILITIES:

Lead and perform advanced signal integrity simulation and analysis for high-speed interconnects, including connectors, cable assemblies, and PCB interfaces using EM and circuit simulation techniques. •    12+ years of relevant experience in signal integrity and high-speed design, including interconnect and/or system-level applications. •    Lead signal integrity design and optimization of connectors and cable assemblies to meet system-level performance requirements. •    Establish signal integrity performance and functional requirements for new product development. •    Review and guide PCB interface design (footprints, breakout, routing transitions) from a signal integrity perspective. •    Act as the technical authority for SI-related challenges across multiple connector and cable assembly programs. •    Drive technology roadmap alignment for high-speed interconnects with evolving industry requirements. •    Lead customer technical discussions focused on interconnect performance, integration, and optimization. •    Influence cross-functional decisions across mechanical design, materials, manufacturing, and system integration. •    Drive innovation and continuous improvement in interconnect SI design, modeling, and validation approaches. •    Lead and mentor engineers across regions to ensure consistency in methodologies, design quality, and technical execution. •    Deep expertise in signal integrity analysis tools (Agilent ADS, Ansys HFSS, CST, or equivalent), with extensive hands-on experience in ADS circuit